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Lecturer(s)
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Bíkl Pavel, doc. Ing. CSc.
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Course content
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1. Logic object. 2. Identification of a static logic object. 3. Boolean functions and formulae. 4. Conversion of formulae, minimization of Boolean functions and their compression record, solutions of homogenous Boolean equations. 5. Record of Boolean functions into Karnaugh maps. 6. Minimization of Boolean formulae and their systems by Karnaugh maps. 7. Structural model of a static logic object, finite automaton, state. 8. Design of a static circuits which is defined by a system of response functions. 9. Conversion Mealy automaton into Moore one and on the contrary, identification of a dynamic object by finite automaton. 10. Design of dynamic circuits according to a state table with D flip-flops. 11. Minimization of number of a total automaton state. 12. The same like in the point 10 only with RS flip-flops. 13. States coding synchrronous logic objects.
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Learning activities and teaching methods
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Laboratory work, Skills demonstration
- Practical training (number of hours)
- 46 hours per semester
- Contact hours
- 14 hours per semester
- Presentation preparation (report) (1-10)
- 10 hours per semester
- Preparation for laboratory testing; outcome analysis (1-8)
- 8 hours per semester
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| prerequisite |
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| Knowledge |
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| Without pre-requisites. |
| learning outcomes |
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| A student has control of electronics bases. |
| teaching methods |
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| Laboratory work |
| Skills demonstration |
| assessment methods |
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| Oral exam |
| Skills demonstration during practicum |
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Recommended literature
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Bokr, Josef; Jáneš, Vlastimil. Logické systémy. Vyd 1. Praha : Vydavatelství ČVUT, 1999. ISBN 80-01-01992-6.
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Bokr, Josef. Logické obvody a automaty. Plzeň : Západočeská univerzita, 2003.
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Randy H. Katz. Contemporary Logic Design. Prentice Hall, 2-nd edition, 2004.
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